A Quantum Path Toward Denser Computer Memory
As conventional memory approaches its physical limits, Japanese researchers are exploring a new memory technology that uses quantum tunneling, shrinking devices to better accommodate AI workloads.
TECH TUESDAY || 2026.03.10
Size matters, and it appears that smaller is better—at least when it comes to ferroelectric tunnel junctions.
What’s a ferroelectric tunnel junction, you may properly ask? It’s a tiny electronic component that could become a key building block of future computer memory.
A team of researchers in Japan has found that shrinking these devices dramatically improves their performance. In experiments with nanoscale junctions fabricated directly on silicon, the smallest devices produced far larger differences between their “on” and “off” electrical states. This is an advantage that could help future memory systems store data more efficiently and reliably.
Such advances could replace convention computer memory methods and prove essential for emerging technologies such as artificial intelligence, edge computing, and the Internet of Things, all of which demand faster, denser, and more energy-efficient data storage.
The team, from the Institute of Science Tokyo, reported the work in the journal Nanoscale.
Limits of Today’s Memory
Modern computing relies on enormous amounts of data stored in electronic memory. Most of today’s non-volatile memory—the kind that retains data even when power is turned off, such as flash memory—stores information by trapping electric charge inside tiny structures on a chip.
That basic approach has powered the explosive growth of digital storage for decades as engineers steadily shrank those structures to pack more memory onto each chip. But as engineers shrink these devices to pack more memory into smaller spaces, that approach is running into physical limits. Charges can leak away, and the devices become harder to operate reliably.
For years, researchers have been exploring alternative designs that store information not as electric charge but through other physical properties of materials. One idea kicked around for some time has been the ferroelectric tunnel junction, or FTJ.
An FTJ is a nanoscale electronic device made from two metal electrodes separated by an ultrathin ferroelectric layer only a few nanometers thick. Ferroelectric materials have a special property in which their internal electric polarization can be flipped between two stable directions by applying a voltage.
Those two polarization states change how easily electrons can tunnel through the ultrathin layer, a quantum-mechanical effect in which electrons pass through a barrier that would normally block them. The result is two distinct electrical resistance states representing the digital “0” and “1” needed for memory storage. This is a wholly different approach to storage.
Although ferroelectric tunnel junctions have attracted growing interest as candidates for next-generation memory, an important question has remained unresolved: What happens when these devices are pushed to extremely small dimensions?
In theory, shrinking electronic components can degrade their performance. Smaller structures often suffer from electrical leakage, material defects, and other nanoscale effects that interfere with reliable operation.
Small Devices, Big Performance
To investigate how device size affects FTJ behavior, researchers led by Yutaka Majima from the Materials and Structures Laboratory at the Institute of Science Tokyo fabricated a series of nanoscale junctions directly on silicon substrates. Using electron-beam lithography, they produced “nanocrossbar” devices ranging from tens of thousands of square nanometers down to junctions only about 25 nanometers across.
(For reference, a nanometer is a millionth of a millimeter and a billionth of a meter.)
These junctions consisted of a titanium/titanium-oxide top electrode, an ultrathin ferroelectric layer made from yttrium-doped hafnium oxide only a few nanometers thick, and a platinum bottom electrode.
By measuring the electrical behavior of devices of different sizes, the researchers determined how shrinking the junction affected tunneling electro-resistance, the difference between the device’s “on” and “off” states that allows it to store digital information.
What they found was somewhat counterintuitive: The smaller the junctions became, the better they performed. As the device area shrank, the difference between the electrical resistance of the two polarization states increased dramatically. This contrast, known as tunneling electro-resistance (TER), allows ferroelectric tunnel junctions to store digital information reliably.
In the smallest devices, the researchers observed TER ratios far larger than those measured in larger junctions. In practical terms, the memory states become easier for electronic circuits to distinguish, improving reliability when reading stored data.
That matters because modern memory density is largely determined by how small each storage element can be made. In today’s flash memory, those elements are already only a few dozen nanometers wide, roughly the same scale explored in this experiment. A modern one-terabyte microSD card, for example, stores about a trillion bytes on a chip smaller than a postage stamp.
If ferroelectric tunnel junctions can operate reliably at even smaller dimensions, engineers could pack far more memory cells onto a chip.
For computer engineers searching for new forms of non-volatile memory, that is an encouraging result. If the technology can be scaled for commercial chips, these tiny junctions could help future memory devices store more data while consuming less energy, an increasingly important goal as artificial intelligence systems demand ever larger amounts of digital storage.
More Information:
Journal Article (open-access): Sun, Zhongzheng, et al. “High-Resistance-State Tunneling in 25 nm TiOx/Y-Doped HfO2/Pt Nanocrossbar Ferroelectric Tunnel Junctions.” Nanoscale, vol. 18, no. 5, 5 Feb. 2026, pp. 2525-35, https://doi.org/10.1039/D5NR04010H
Funding Sources: Japan Science and Technology Agency (JST); Ministry of Education, Culture, Sports, Science and Technology (MEXT); and the Japan Society for the Promotion of Science (JSPS)
Related Video: “Magnetic tunnel junction: from nonvolatile memory to probabilistic computing” by Hideo Ohno, Tohoku University